FPGA Verilog Logic Design Lecture Note

2009-04-01
Here are links to slides.

Day1 CourseIntroduction

Day1 02.Introduction

Day1 Lab1

Day2 Open

Day2.Combinational Logic

Day2 Intro. Model Sim

Day2 Logic Circuits

Day2 Verilog HDL Basic

Day3 Open

Day3 實驗板介紹

Day3 Quartus II Tutorial

Day3 Lab

Day3 順序控制的組合邏輯實現

Day4 Open

Day4 順序控制的循序邏輯實現

Day4 Lab